Intel Corp’s presence at Supercomputing Europe ’92 was by way of a pretty impressive stand featuring a DVI multimedia presentation that extolled the virtues of the company’s activities in the supercomputing arena. It has long been Computergram’s opinion that Intel’s supercomputing movements have been strangely low-profile in Europe and, having recently suggested this to Intel’s vice-president of own-badged products in Europe, Steve Nachtsheim, it was amusing to find on arrival at the show a heavy poster campaign publicising and directing the press to an Intel supercomputing strategy briefing. Intel’s supercomputing systems division was founded in 1984 and is headquartered in Beaverton, Oregon.

TeraFLOPS

Quoting International Data Corp figures, Nachtsheim claims that Intel leads the world parallel supercomputing market, in 1990 accounting for 31% of all shipments, nCube in second place with 16% and the UK’s Active Memory Technology Ltd – a spin-off from ICL Plc – in joint third place with 12%, alongside Bolt, Beranek & Newman Inc. (Thinking Machines took fourth place with 11%, MasPar Computer Corp fifth with 10% and Bristol, UK-based Meiko Scientific Ltd sixth with 8%.) Intel boasts 300 supercomputer sites worldwide, 50 of which are in Europe. Intel’s offerings are aimed primarily at the scientific market, though the company does claim to have users in the finance and commercial sectors. Describing itself as being on the road to TeraFLOPS – isn’t everyone? – Justin Rattner, founder of Intel’s supercomputing technology eight years ago, thought it a good idea to begin by reminding the press exactly what Intel’s supercomputing offerings are. The original iPSC/1 machine, launched in 1985 delivering up to 100 MFLOPS – becoming the 80386-based iPSC/2 in 1987 – was two years ago succeeded by the 80860-based iPSC/860 large-scale multiple instruction multiple data parallel machine, peaking at 7.6 GFLOPS (CI No 1,338). The iPSC/860 – one of Intel’s three current supercomputing offerings – is built on a multi-dimensional scalable hypercube topology, a maximum configuration comprising 128 80860 processor nodes, 8Gb RAM and 9.1Gb disk storage, costing around $3.5m. The machine runs Unix System V.3.3 and, on each node a kernel operating system, NX/2, optimised for message-passing between processors. This 80860-based supercomputer achieved over 100 installations last year, and was awarded the Gordon Bell prize for price-performance. Meanwhile, Intel had in 1989 joined forces with the US Defense Advanced Research Projects Agency, DARPA, announcing the $27m Touchstone research project to develop supercomputer software and prototypes capable of breaking the 100 GFLOPS barrier. The most recent product of the project, the 80860-based scientific Touchstone Delta System, rating a peak 32 GFLOPS, was the prototype for Intel’s recently-launched Paragon machines. It was built for the Concurrent Supercomputing Consortium and is installed at the California Institute of Technology in May (CI No 1,685). And last year Intel commercially introduced its iWarp, a range of real-time products for the signal and image processing market. These encompass technology that was developed over a five-year collaborative effort between Intel and Carnegie Mellon University.

By Sue Norris

The products range from single-board arrays, which plug into Sun workstations as application-specific accelerators; to card cage assemblies designed as self-contained processor arrays supporting the 19 rack form-factor for embedded applications; to large-scale supercomputers expanding to 1,024 processors peaking at 20 GFLOPS. The culmination of all Intel’s parallel supercomputing efforts, however, is the Paragon XP/S, launched just four months ago (CI No 1,805). The company describes the monsters as combining a truly scalable TeraFLOPS architecture with a state-of-the-art communications fabric capable of harnessing that power for real-world use. Early configurations of the 80860XP RISC-based Paragon, which runs a node-level implementation of OSF/1 Unix, range from 5 to 300 G

FLOPS, prices starting around $2m. Intel concedes that to scale up to a theoretical maximum TeraFLOPS configuration would cost over $300m today, and is ready to admit that it won’t be until 1995 that a TFLOPS system will be affordable – $25m to $30m that is. Intel holds up its Paragon offering as offering over 18 times the performance of Cray Research Inc’s latest vector supercomputer machine, the Y-MP C90. The firm says its commitment to an affordable TeraFLOPS goal is further demonstrated by another recent collaboration with DARPA. The new joint effort, announced last month, is aimed at accelerating the development of advanced high-performance computer systems, capable of sustaining 1 TFLOPS. The new venture is being jointly funded by the two parties – DARPA pledging to spend $21m over five years – in support of the US High Performance Computing and Communications Programme, which aims to keep the US ahead in the supercomputing performance arena. Three critical technologies will form the basis of the Intel/DARPA TeraFLOPS initiative – Intel’s Touchstone parallel software architectural design; fine-grained interprocessor communication technology, as used in the iWarp range, which will be implemented in a new generation of sub-micron VLSI components; and a new-generation RISC, to be derived from the 80860 chip.

Grand Challenge

Intel, like its competitors in the race towards TeraFLOPS, recognises that the market for such unimaginable performance levels is more or less restricted to grand challenge applications – global climate modelling, large computational fluid dynamics, and human gene modelling. Something else Intel announced at the Paris show, in a further boast about its TeraFLOPS commitment, was that it has just established a European Supercomputer Development Centre in Munich, south Germany. Dr Thomas Bemmerl of the Technical University of Munich is moving to Intel to head up the centre’s activities and, under his direction, the centre will collaborate with European users and research labs to develop software technologies in support of TeraFLOPS computing. During the question and answer session, Intel was asked whether there was any truth in rumours that Intel will give up its 80860 RISC development – Nachtsheim’s reply was that the chip is the foundation of what (Intel is) doing with the TeraFLOPS system, and that the next step of the Touchstone project will also use the Intel RISC. On the supercomputing division’s financial status, Intel was not forthcoming, except to say that it is profitable and that revenues have doubled each year for the last three years. The division has the largest development budget, and is expected soon to be the largest revenue source within the Intel Products Group.