The arrival of the T9000 Transputer threatened to be an anti-climax, given that the device had been previewed back in 1991 (CI No 1,653). But Inmos Ltd was determined to make it a high profile affair. The chosen venue was the auspiciously grand lecture theatre at the Victoria & Albert Museum, the presentations simultaneously interpreted by a row of translators – a reminder of the event’s global significance. The whole thing kicked off with a state of the art video which introduced the T9000 as the next link in the chain for ranging from supercomputers to database managers, to switching and telecommunications systems, management systems for production lines and car engines.

Burn out

The device was also hailed as the next step in Inmos’s technological evolution, filling the gap between the former T2, 4 and 8 families and the proposed modular ‘Chameleon’ product line (CI No 2,137). Inmos Transputers are unique because they combine a processor, communications links and memory on a single chip. The power and complexity of this latest offering makes it the world’s fastest single-chip computer, according to its maker. The T9000 has 3.3m transistors. Each of its four communications links can convey the equivalent of 20 bibles; and its internal communications crossbar can throughput the equivalent of 200 bibles per second. Inmos sees the device as the blueprint for all future chip design. Conventional microprocessors, the company reckons, will reach ‘burn out’ by about 1996 or 1997. By then, performance enhancement will centre more on multiple capabilities than, say, clock speeds, which likely will have reached a plateau. Multi-purpose chips are likely to be popular with manufacturers, because they offer the advantages of reduced chip count and board space, and faster time to market. Indeed, Inmos has already shipped 1m Transputers and is expecting to double this number over the next year. It will be targeting the T9000 at traditional markets such as office automation, PABX switching systems, industrial robotics high-performance computing and military and space systems, alongside existing Transputer family members. It says it has no plans to phase these former Transputer lines out. The T9000 replaces the T805 as Inmos’s high-end offering. It uses Tungsten Plug technology, which helps integrate the various elements in the chip in as small a package as possible. The Pentium, explained Ian Pearson, director of Inmos’s Transputer Business Unit, is 30% bigger though it has the same number of transistors.

By Lynn Stratton

The device’s CPU combines a 32-bit integer processor producing up to eight instructions per cycle and 64-bit floating point unit and has 200 MIPS, 25 MFLOPS performance. The memory system has 16Kb on-chip memory, configurable as cache and/or RAM; 800Mbps, four access-per-cycle workspace cache; and Programmable Memory Interface. The so-called Virtual Channel Processor connects with four four-wire 100Mbps links, with up to 64,000 channels per link and 80M-bytes total link bandwidth. This is all bundled into a 208-pin CLCC package which, in single chip applications will run on 3W; 5W is needed to drive large external memory systems. Inmos says the T9000 is easily scalable with no interface or buffer logic required to link multiple devices. Communication between up to 32 indirectly connected T9000s is possible with Inmos’s C014 Packet Routing Switch. There is also a C100 System Protocol Converter that links T9000s to previous generation Transputers and C101 Link Adapter for interfacing with standard buses in a variety of other devices. These will be available during 1993. Software development and programming for multiple T9000s is as easy as for single devices, according to Inmos. ANSI C, C++ and Occam compilers are available for development on personal computers and Sun Microsystems Inc workstations. Hardware development has also been simplified with the availablity of a range of Transputer f Modules, or TRAMs, high performance modules and motherboards. Fabrication will initially be based in Newport, South Wales b

ut, from 1994, this will be extended to parent SGS Thomson Microelectronics NV’s Crolles facility. This will enable Inmos to take advantage of Thomson’s 0.5 and 0.35 micron fabrication techniques to produce faster, 3V T9000s. Inevitably the news of the T9000’s arrival, approximately a year overdue, was accompanied by a host of announcements from other vendors, anxious to dust off their T9000-based products. Among them were Parsytec Computer GmbH and Parsys Ltd with their T9000-based supercomputers and Ektron Applied Imaging Inc with its Boss-9000 parallel processor. Inmos’s Pearson was philosophical about the delay, admitting it had lost the company customers, but saying he expected forthcoming T9000 generations to lure the strays back to the fold. Work on the successors to the T9000 has been under way since 1991, he explained, under Inmos’s Chameleon programme.

Chameleon

This aims to produce a new chip architecture comprising a number of interconnectable modules, that can be used individually, or in combination, in single chips. The modules will include 64-bit processors and cache, programmable communications processors, high speed communications interfaces, link routers, floating point co-processors, re-configurable co-processors and dedicated Asynchronous Transfer Mode communication and graphics and video processors. This modular architecture will integrate around 10m transistors and two special interfaces: an interconnect protocol for supporting scalable shared memory access, communication and control; and the so-called virtual binary for supporting sequential, parallel and distributed programming. The virtual binary will support standard operating systems like Unix and Windows NT, and compilers and programming languages like C, C++, Fortran and Occam. Chameleon chips will be aimed at the Transputer’s traditional telecommunications markets, along with more mainstream computer markets, multimedia workstations and portables, database and computing servers. The first Chameleon products are expected out in 1996.