The MOSIS Service, a provider of fabrication services to designers of advanced integrated circuits, has expanded its relationship with IBM to include silicon-on-insulator (SOI) technology at multiple lithography nodes.
MOSIS is reportedly offering IBM’s 45-nm SOI technology on 300mm wafers and IBM’s 180-nm SOI technology on 200mm wafers.
The initial 45-nm shuttle run is scheduled for September 1, 2009. IBM’s 45-nm 12S0 technology reportedly provides transistor performance improvement (up to 30%) over traditional bulk technology at the same lithography node. The company claims that in addition to providing isolation for analog circuit performance, this SOI offering can reduce the circuit area by up to 25% relative to bulk CMOS, which reduces the cost of overall semiconductor content.
Reportedly, the 45-nm SOI process offers four transistor options (Regular, High Vt, Super High Vt, Ultra High Vt), in addition to up to 11 metallisation layers. The company said that a range of SRAM (Static Random Access Memory), embedded DRAM (Dynamic Random Access Memory) options, number of ESD (Electrostatic Discharge) protection options and passive elements are also available.
The first available 180-nm SOI shuttle run has reportedly been completed, with the next shuttle run scheduled for September 14, 2009.
Wes Hansford, deputy director of MOSIS, said: MOSIS is delighted to partner with IBM to now offer SOI foundry technologies. The 180-nm 7RF SOI technology provides a very compelling alternative to GaAS (Gallium Arsenide) technology for RF switches, while the 45-nm SOI technology delivers outstanding performance while maximising power efficiency and minimising overall chip size for SOC (System-on-Chip) applications.
“By broadening our portfolio, MOSIS provides a single interface between designers and a greater range of foundry services, thereby enabling our clients with a faster and lower-cost route to market.
MOSIS has been a partner of IBM since 2001 and provides MPW (multi project wafer) services to enable low-cost prototyping, engineering runs, and low-to-medium volume production through IBM’s semiconductor fabs. MOSIS reportedly provides designers with a single interface to a portfolio of semiconductor technologies.
