By Timothy Prickett Morgan
The conviction is growing that IBM Corp really is on track to deliver a much-improved Power3-II processor for technical workstations and servers in the first quarter of 2000 (CI No 3,793). This is later than the September/October arrival time which had originally been expected, but the compensation may be that the Power3-II will also be significantly faster, running at 375MHz rather than the 300MHz which had been predicted.
This intelligence, from sources close to the company, may also go some way towards explaining how IBM plans to make good on plans to offer two different Power3-II workstation/server configurations – by offering two different clock-speeds.
This raises the prospect of new low-end RS/6000 technical workstations and servers offered running at either 350MHz or 375MHz for instance or even between 350MHz and 400MHz. On the other hand, IBM could decide to differentiate the line by offering two unique motherboards: one with two-way SM. and the other with four-way SM.
IBM already has a two-way motherboard for the 43P model 260 machines, which it repackaged as the Winterhawk SP node in February 1999. Or it could simply offer a single four-way 375MHz Power3-II board and be done with it.
IBM is expected to price the Winterhawk-II SP nodes very aggressively, offering as much as twice the bang for the buck as the Nighthawk SP nodes. The Nighthawks, which have up to eight 222MHz Power3 chips in a single node, were announced by IBM in mid-September.
Sometime during the second half of 2000, probably when I-Star PowerPC servers with the RS/6000 and AS/400 brand will start shipping, IBM is expected to debut the Nighthawk-II SP nodes, which will have up to 16 Power3-II processors in a single node. If the Power3-II turns out to have a 375MHz or 400MHz clock, these will be powerful machines, but there is bound to be more to come.
IBM is also expected to crank the clock speed on the Power3 to 500MHz or more by the end 2000 or early 2001 with the Power3-III chip, which adds IBM’s SOI CMOS-8S chip process.