IBM’s prototype 16M-bit dynamic memory chip, fabricated on an existing semiconductor production line in Essex Junction, Vermont (CI No 1,364) accesses the first bit of data from one of its storage cells in 50nS and subsequent bits at a sustained data serial rate of 10nS. At this speed, nearly all the chip’s 16.77m bits could be read in only a twenty-fifth of a second. The chip measures approximately 0.33 by 0.75 and is fabricated in CMOS. To achieve greater memory capacity without significantly increasing the size of the chip, it uses a memory cell four microns square similar to that used is IBM’s 4M-bit chip but with memory cells about one-third the size. The cell uses a structure which is ‘dug’ into the silicon to store the chip’s bits, rather than placing the cell on the surface of the silicon. This technique allows for greater memory capacity without signficantly increasing the size of the chip. The chip operates at either 3V or 5V, so providing flexibility for future use accross IBM’s product line. The company also described a 300,000 circuit logic chip in a family of semi-custom application-specific circuits. A demonstration chip measuring 0.375 containing 2m transistors and logic circuits that operate at speeds of 180pS has been fabricated on a semiconductor line at Essex Junction. Also fabricated in CMOS, it is believed to be one of the densest and fastest ASIC logic chips as yet announced, IBM reckons. Both parts were described by IBM researchers at the International Solid State Circuits Conference held in San Francisco at the end of last month. – E T
