IBM Corp has been describing a prototype 0.08-micron CMOS device that could yield GHz-range production chips within a decade. We feel this is do-able, Electronic Engineering Times quotes Michael Polcari, research director for silicon technology at IBM, saying at the Symposium on VLSI Technology in Honolulu, where the achievement was announced. Using bulk silicon and conventional CMOS, an IBM research team built an unloaded inverter-delay circuit using 0.08-micron effective channel lengths, the paper says. The circuit exhibited a delay per stage of 22pS at an operating voltage of 1.8V. For low voltage operations, the technology can be run at below 1.5V, perhaps as low as 1V, said Lisa Su, lead device design engineer on the project. The test circuit can drive 0.8mA per micron of gate width, which Su said is the highest level of drive current for any sub-tenth-micron work presented to date.
