NEC Corp semiconductor executives predict slow growth in Japan, but new products for the US market. With NEC’s downturn in sales for the last fiscal year, and low growth of 3% forecast for the current fiscal year, NEC’s semiconductor executives seem to be placing their faith in the US market. In the 1992-93 fiscal year, NEC’s chip production volume was down by 0.7% at $6,825, although semiconductor exports increased 8.8% over the previous year to $1,065m; NEC expects to achieve about $7,280m this year with growth of 12.8% in semiconductor exports this fiscal year to $1,200m. The release last week of the three-chip RISC set for the Windows NT market by US subsidiary NEC Electronics leads NEC to believe that it is well-positioned in the US market. In addition a new chip set called RABIT, for RISC Architecture Bridge Interface Technology, is under development for use with the VR4200 and VR4400 series of MIPS Technologies Inc R-series microprocessors, to replace the Acer Inc-sourced and Advanced RISC Computing chip sets. The circuits being developed for the RABIT chip set are an input-output controller, RABIT-IO, and two memory controllers, RABIT-SYNC and RABIT-RAM; development is expected to be completed in December this year with samples available in March and volume production in April 1994. The chip sets are targeted for use with Windows NT personal computers and low-end workstations, and will range in price from $70 for input-output only, to $110 for input-output plus RAM. Dr Hajime Sasaki, NEC senior vice-president, also outlined the strategy for NEC’s overall manufacturing and development in the semiconductor field. Moves are being made for 4Mb DRAM production in China, where production is to start from September, to reach 1m units per month by the end of 1993. Assembly is also being increased in China, making use of the low-cost labour force and shifting assembly of chips manufactured at the Roseville, California plant from Singapore to the China facility. In terms of development of semiconductors, a line is now being constructed for production of chips at the technology level of 0.35 to 0.15 micron. Planned production level is 2,000 6 wafers per month in a 10,000 square foot clean room. In the long-term,256M-bit and 1G-bit prototype chips are being tested, with the 256M-bit DRAM samples due for shipment in 1995-1986 timeframe and 1G-bit prototype announced in 1996, with engineering samples ready in the year 2000.
