National Semiconductor Corp has launched a highly integrated, next-generation set of chips for fibre distributed data interface, local area networks. The company claims that the chip set features the industry’s highest level of performance and functionality, as well as drawing half the power and having a much smaller footprint than first generation fibre interface chip sets. The five chips in the set are the DP83261 Basic Media Access Controller Device, the DP83251/55 Physical-Layer Controller Device, the DP83231 Clock Recovery Device, the DP83241 Clock Distribution Device, and the Basic Media Access Controller System Interface Device. The Media Access chip is fabricated in low-power CMOS, the others are all BiCMOS devices. The Clock devices feature mixed analogue and digital technology, because of advanced speed and timing requirements, they were essential building blocks in the set. All but the System Interface Device can be coupled to the host system bus through a customised interface. In the second half of 1990, the company will introduce another chip, a BMAC System Interface device for the most popular computer system buses, including S bus, Micro Channel, VME, EISA and AT. The chip set has fullduplex architecture neccessary for selftesting network stations. And because of its high level of integration, it can be used to mass-produce high-performance single-board 100Mbps Fibre Distributed Data Interface systems. The networks use a Token access method and ring topology, which prevent performance degradation as network demand increases. The initial chips from NatSemi are available in sample quantities for $350 per set in 100-unit quantities. Volume production for the initial four chips is expected in the third quarter and the Basic System Interface chip will be available in sample quantities in the fourth quarter.
