Intel Corp yesterday duly launched the next generation 80486 microprocessor in 25MHz and 33MHz versions, claiming that the 1.2m transistor part, implemented in the firm’s 1 micron CHMOS process, executes 15 to 20 VAX MIPS at 25MHz, 20 to 25 at 33MHz. The chip implements the full 80386 and 80387 instruction sets, the 82385 cache controller plus 8Kb of data cache, and paging and memory management units, and features a new burst data transfer mechanism that loads four 32-bit words concurrently to keep the cache and the pipeline full. Frequently-used instructions are implemented using Reduced Instruction Set Computing techniques and the part can share data with the 80860. There are new multiprocessing and cache instructions and cache consistency protocols. Other performance claims are 37,000 Dhrystones per second at 25MHz, 49,000 at 33MHz, and 6.1M double-precision Whetstones per second at 25MHz, 8.2M at 33MHz. Microsoft says that it will bring out OS/2-386 this year to support full 32-bit working on the 80386, and that the new operating system will also support the 80486. Samples of the 25MHz version are set for the third quarter, volume – and 33MHz samples – in the fourth; the 25MHz is $950 for 1,000-up.
