Sun Microsystems Inc reports that CERN, the Centre for European Research into Nucleonics on the French border of Switzerland, has licensed the Sparc RISC microprocessor architecture for use the system that will gather data from electron-positron collision experiments: CERN has hitherto used Norsk Data A/S minis at the node points around the ring, but the Sparc was chosen because of its performance, real-time capabilities and open architecture, enabling the kind of customisation CERN needed – several hundred networked controllers will be used around CERN’s accelerator, each with up to four Sparc CPUs for 50 MIPs.
