Bristol, UK-based PixelFusion Ltd is claiming that its forthcoming graphics processor, Fuzion will fundamentally redefine graphics on the PC. It also says that the massively parallel architecture of the single chip design will give it applications beyond just the high end graphics sector. However, the pathway of massively parallel R&D is already strewn with corpses – Hewlett-Packard Co’s Visualize 3D technology (CI No 3,336) and the UK government-funded Inmos Transputer. So what makes PixelFusion likely to succeed where others have failed? The answer says Bob Pearson, VP of marketing at the company, is the single chip design. Previous solutions were based on multiple chip designs on a motherboard – which led to a loss of latency at the chip interconnects on the board. Latency is much less of an issue at chip-level, and the company says that implementing a multi-element array design on a single piece of silicon is now a viable option. The company intends to issue the embedded memory design as a 0.25 micron chip initially, with 0.18 micron a year or so later and then slimming down to a 0.12 micron chip after that. The company is making some wild claims for its design, saying that the Fuzion chip is capable of TerraOps worth of integer calculations and tens of thousands of gigaflops worth of floating point performance. The 3D graphics system is based on concepts of a pixel-based rendering architecture developed on the PixelFlow project at the University of North Carolina, which was also the basis of HP’s Visualize technology. However, Pearson says that the concept, which involves having multiple groups of pixels on a display controlled by a single processor element, has been taken much further by the developers of the massive array Fuzion core design. The company won’t reveal how many processor elements will be on the first chip. The new design only uses one patent from the North Carolina days, however. Certainly, one difference from the HP board will be the price, which would have been around $8,000 – had HP not dropped the system before it was even launched. The Fuzion chip will cost between $1,500 and $3,000 for high end NT systems. Pearson sees the CAD, modeling and simulation sectors as the initial market for the technology. However, he says that the company sees applications for high volume, high data applications such as cryptography, speech recognition and spatial/audio computing for the massively parallel design in the future. The company demonstrated a prototype Fuzion board at the Siggraph show this year, but the single chip itself won’t be ready until the second half of next year – a long time in high-end circles. The company was spun out from UK virtual reality specialist Division Group Ltd 18 months ago. It currently employs 35 people and has operations in the UK and stateside. Some of the people employed by the company worked on the ill-starred Transputer and others are veterans of the PixelFlow project.
