NEC Corp’s next-generation CMOS ASIC processes will be 0.15 and 0.18 microns for high-end designs and 0.18 microns for low-power devices. They will use seven layers of metal, support 34m transistors and will utilize a mix of aluminum and copper technologies initially with an all-copper process to follow. First aluminum/copper chips will roll off the lines in October with volume shipments ramping up in the second quarter of next year. Copper versions will sample in the fourth quarter of 1999 with mass production in the first quarter of 2000. A five-layer metal, 7m transistor part will cost $410 for 10,000-up per month. NEC says ASICs built using the process will be up to 1.5 times as powerful as previous devices and reach 500MHz. NEC says it will support 64-bit MIPS RISC cores on the processes as well as the others already its 0.25 micron library. The company expects that by 2005, 50% of the entire integrated circuit market will be driven by demand for system-on-a-chip products. Dataquest says NEC has been the world’s largest ASIC supplier for five years.
