In his keynote speech to the conference, Mike Fister, senior vice president and general manager of the vendor’s enterprise systems group sketched out the future roadmap for the its Itanium and Xeon product lines.

The Itanium 2 family will feature dual core products with Montecito, due in 2005.The vendor has already said that a successor, Tanglewood, will feature multiple cores. On Tuesday, Intel president and COO Paul Otellini said Tanglewood would offer seven times the performance of Intel’s current generation of Itanium.

While the vendor has introduced its hyper-threading technology, which makes a single core look like two to software, in its 32-bit lines, it has yet to extend this to its 64-bit Itanium line.

Ajay Malhotra, director of enterprise marketing and planning for Intel’s enterprise systems group, confirmed that hyper-threading could be extended to Itanium, and that with Tanglewood, software could be presented with mutliple images of a single core. At the same time he said, there was a point at which it became unproductive to add more threads. Malhotra refused to speculate how many cores Tanglewood could span.

However, he said, that if a chip is multi-cored, and multi-threaded, you can imagine the exponentiality [in performance].

Fisters’s presentation also showed a refresh of the Deefield low-voltage Itanium next year, with further low-voltage follow-on products after that. At the top end of the Itanium range the MP Itanium 2 will push past 1.5GHz next year, with the Montecito following after that. In the mid-range, a DP 1.4GHz with 1.5MB of cache is due next year, followed by a DP Montecito in 2005.

The Xeon roadmap calls for a 3GHz MP Gallatin with 4MB of cache next year, before the introduction of the higher frequency Potomac sometime after late 2004, with the dual core Tulsa following sometime thereafter. On the DP track, the 90 nanometer built Nocona, due next year, will see Xeon breach 3.2GHz, while its followup, Jayhawk, will offer an 800MHz FSB. PCI Xpress chipsets for Xeon will appear next year.

This article is based on material originally published by Computerwire