Somewhere in the depths of Bell Atlantic Corp, of Philadelphia, Pennsylvania, Very Long Instruction Word technology is making a resurgence, and this time around it’s destined for use with Sun Microsystems Inc’s Sparc RISC chip. Bell Atlantic acquired the technology from failed Branford, Connecticut minisupercomputer builder Multiflow Computers Inc for an undisclosed fee after the pioneer of that particular brand of computing threw in the towel back in 1990 when it ran out of cash. Bell Atlantic is understood to be working on an implementation of Multiflow’s ingenious Trace Scheduling Compilers for 64-bit Sparc architectures. The development work isn’t thought to be linked to Sun in any formal way, but the news comes just a week after Sun revealed that it is playing with a 64-bit Sparc, and outlined its intent to define the ground rules for such environments through a new release of Sparc International’s interface specification for 64-bit Sparc architectures. Unlike currently popular pipelining and superscalar techniques, Very Long Instruction Word technology uses Trace Scheduling to compile C and Fortran programs into long instruction words for simultaneous execution. The compilers keep all processes in a multiprocessing system busy, and are adaptable to architectures that can execute more than one instruction per cycle – such as RISC. The technique requires the compiler to recognise which instructions are dependent on the results of the previous one and avoid scheduling parallel execution of such instructions, while letting others go. Sun comments that it is not doing anything with VLIW, but the fact that Bell Atlantic says it is, is great. VLIW technology running on Sparc will give us other markets to break into… and it’ll be great for Solaris too, if it is binary-compatible.
