Hewlett-Packard Co’s low-cost Precision Architecture RISC Unix workstation series, codenamed Snakes, are to be announced on March 26. A low-end diskless system, using a 50MHz Precision Architecture RISC part, is likely to come in at $12,000 with 55 MIPS and 15 MFLOPS performance, 16Mb memory and 19 monitor. Larger configurations will come in the $22,000 to $27,000 price range, while a high-end, 66MHz box with 75 MIPS performance will also be announced. Hewlett-Packard lifted the lid a little on the new workstations at an IEEE conference in San Francisco last week. Electronic Engineering Times says the 66MHz implementation of the Precision Architecture RISC part has been specially tweaked for use in a workstation, and comes with an extended 128Kb cache size and 256Kb of data. A Specmark of 55.3 is attributed to the Snake – just a shade higher than the 52 we suggested here at the end of January. The 66MHz iteration of the part, the PA-RISC 1.1, has double the number of floating point instructions – 32 – of previous implementations, although the processor retains its two-chip configuration. The spectre of in compatible byte ordering on the machines was also raised when Hewlett elected to use EISA as its expansion bus – EISA and Intel architect ures use little-endian byte ordering while the Precision Architecture is engineered is big-en dian by design however the company has repor tedly implemented a special bus-wiring tech nique which enables the EISA slots to be used. Incompatible byte ordering proved something more of headache for DEC, when it introduced its DECstation Ultrix series, based on MIPS Computer System’s R series RISC processor. DEC reversed the byte ordering in that implementat ion to bring the DECstations into line with its VAX computer series, but this meant applicati ons developed for use on the generality of MIPS-based architectures could not run on DEC’s workstations. The problem was not finally overcome until MIPS was able to design a cunn ing technique into its processor series that detects the byte ordering arrangement an appli cation requires and adjusts itself accordingly.
