Inmos Ltd has launched its H1 Transputer as the T9000. The new RISC microprocessor, with its increased power, parallel capabilities, and communication performance, is targeted at real-time embedded computing – supercomputing, database applications, and X-terminals; imaging – multimedia applications, colour laser printing and image processing; and communications – ISDN and internetworking systems. It fabricated in a triple-level metal CMOS process, integrating a 32-bit integer processor, a 64-bit floating point unit, 16Kb of cache memory and a communications subsystem – consisting of a dedicated virtual channel processor and four 100Mbps serial Transputer-to-Transputer links – on a single chip. The core superscalar CPU, containing the 32-bit arithmetic logic unit and 64-bit floating point unit, enables a peak performance of 200 MIPS and 25 MFLOPS at a clock speed of 50MHz – 10 times more powerful than the T805 Transputer. A five-stage pipeline structure enables the issue of multiple instructions per cycle an instruction grouper in the pipeline takes code sequences and organises the instructions into appropriate groups, eliminating the need for a compiler to schedule the multiple execution units. The on-chip serial links have a total bi-directional communications bandwidth of 80M-bytes-per-second used for direct communications between T9000s. The 16Kb on-chip cache can be programmed to function as 16Kb of on-chip memory or 8Kb of on-chip memory and 8Kb of cache. A 64-bit programmable memory interface supports the on-chip cache, directly addressing 4Gb of physical address space and provides a peak external memory bandwidth of 200M-bytes-per-second. Dynamic, static, EPROM and video are the four banks of external memory supported – the data bus of each can be configured to be 64, 32, 16 or 8-bits wide depending on the type of memory used. The T9000 is supported by three new peripheral devices – the C104 packet routing switch, developed within the Esprit II Puma project; the C100 system protocol converter, which converts between first generation Transputer links and T9000 links; and the C101 link adaptor, which provides an interface between T9000 links and external systems such as buses. The T9000 is software-compatible with the first Transputer generation, and Inmos expects first silicon on the part in the third quarter, with availability in first quarter 1992 in a 208-pin ceramic quad-flat pack when optimising ANSI C, Fortran 77 and Occam 2 compilers will arrive.
