MOMENTUM BUILDING FOR VERILOG DESCRIPTION LANGUAGE TO BE AGREED AS STANDARD AS JAPANESE WORKING GROUP IS FORMED

The Japanese computer-aided engineering community has been trying to promote the Verilog programming language as a de facto standard for a number of years now, says Maqsoodul Mannan, IEEE 1364 Working Group chairman; so it comes of no surprise that Open Verilog International has announced a Verilog hardware description language IEEE 1364 Working Group in Japan. With Verilog HDL, chip designers can design at various levels of abstraction. Heading up the Group will be Yoshiharu Furui, the IEEE 1364 Working Group’s vice-chairman and general manager of the Design Automation Department at the Sony Corp in Japan. According to chairman Mannan, IEEE members will start voting on the Verilog HDL 1364 standard late this year or early next year.

Sign up for our regular news round-up!

Give your business an edge with our leading Tech Monitor

Sign up